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ACPL-H312 and acpl-k312 2.5 amp output current igbt gate driver optocoupler with low i cc & uvlo in stretched so8 data sheet caution: it is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by esd. description the ACPL-H312/k312 contains a gaasp led. the led is optically coupled to an integrated circuit with a power output stage. these optocouplers are ideally suited for driving power igbts and mosfets used in motor control inverter applications. the high operating voltage range of the output stage provides the drive voltages required by gate controlled devices. the voltage and current sup- plied by these optocouplers make them ideally suited for directly driving igbts with ratings up to 1200 v/100 a. for igbts with higher ratings, the ACPL-H312 /k312 series can be used to drive a discrete power stage which drives the igbt gate. the ACPL-H312 has an insulation voltage of v iorm = 891 v peak (option 060). the acpl-k312 has an is- sulation voltage of v iorm = 1140vpeak (option 060). functional diagram features ? 2.5 a maximum peak output current ? 2.0 a minimum peak output current ? 15 kv/s minimum common mode rejection (cmr) at v cm = 1500 v ? 0.5 v maximum low level output voltage (v ol ) ? i cc = 3 ma maximum supply current ? under voltage lock-out protection (uvlo) with hysteresis ? package clearance and creepage at 8mm (acpl-k312) ? wide operating v cc range: 15 to 30 volts ? 500 ns maximum switching speeds ? industrial temperature range: -40c to 100c ? safety approval - ul1577 recognized 3750 v rms for 1 minute for ACPL-H312 5000 v rms for 1 minute for acpl-k312 - csa approved - iec/en/din en 60747-5-2 approved v iorm = 891 v peak for ACPL-H312 v iorm = 1140 v peak for acpl-k312 applications ? igbt/mosfet gate drive ? inverter for industrial motor ? inverter for electrical home appliances ? switching power supplies (sps) application note ? an5336 C gate drive optocoupler basic design ACPL-H312/k312 note: a 0.1 f bypass capacitor must be connected between pins v cc and v ee . truth table led v cc C v ee positive going (i.e., turn-on) v cc C v ee negative going (i.e., turn-off) v o off 0 C 30v 0 C 30v low on 0 C 11v 0 C 9.5v low on 11 C 13.5v 9.5 C 12v transition on 13.5 C 30v 12 C 30v high 1 3 shield 2 4 8 6 7 5 cathode anode v cc v ee v o v ee lead (pb) free rohs 6 fully compliant rohs 6 fully co m pliant options available; -xxxe denotes a lead-f r ee p r oduct
2 ordering information ACPL-H312 /k312 is ul1577 recognized (3750 v rms for 1 minute for ACPL-H312 and 5000 v rms for 1 minute for acpl- k312) part number option package surface mount tape & reel ul 5000 v rms / 1 minute rating iec/en/din en 60747-5-2 quantity rohs compliant ACPL-H312 -000e stretched so-8 x 80 per tube -500e x x 1000 per reel -060e x x 80 per tube -560e x x x 1000 per reel acpl-k312 -000e stretched so-8 x x 80 per tube -500e x x x 1000 per reel -060e x x x 80 per tube -560e x x x x 1000 per reel to order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. example 1: ACPL-H312-560e to order product of stretched so8 surface mount package in tape and reel packaging with iec/en/ din en 60747-5-2 safety approval in rohs compliant. example 2: ACPL-H312-000e to order product of stretched so8 surface mount package in tube packaging and rohs compliant. option datasheets are available. contact your avago sales representative or authorized distributor for information.
3 acpl-k312 outline drawing - stretched s08 package outline drawings ACPL-H312 outline drawing - stretched s08 0.200 0.100 0.008 0.004 0.450 0.018 9.7 0.25 0.382 0.010 1.590 0.127 0.063 0.005 10.250 0.040 0.010 7.620 0.300 0.254 0.050 0.010 0.002 45 7 6.807 0.268 5 nom. 7 5.850 0 + 0.254 0.230 - 0.000 + 0.010 0.381 0 + 0.127 0.015 - 0.000 + 0.005 1.270 0.050 3.180 0.127 0.125 0.005 7 7 10.7 0.421 2.160 0.085 0.760 0.030 1.270 0.050 floating lead protusions m a x . 0.25[0.01] di m ensions in milli m eters [ inches ] lead coplanarit y = 0.1 mm [ 0.004 inches ] 11.5 0.250 .453 .010 [0.0295 0.01] 0.750 0.25 6.807 0.127 .268 .005 1.590 0.127 .063 .005 45 0.450 .018 0.200 0.100 .008 .004 0.254 0.050 .010 .002 [0.300] 7.62 7 35 nom. 7 5.850 0 + 0.25 .230 - .000 + .010 0.381 0.13 .015 .005 1.270 bsg .050 1 2 3 4 5 6 7 8 3.180 0.127 .125 .005 7 7 12.650 .498 1.905 .075 0.76 .03 4.57 .18 1.270 .050 floating lead protusions m a x . 0.25 [0.01] di m ensions in milli m eters [inches] lead coplanarit y =0.1 mm [ 0.004 inches ]
4 regulatory information the ACPL-H312/k312 is approved by the following organizations: iec/en/din en 60747-5-2 (ACPL-H312/k312 option 060 only) approval under: iec 60747-5-2 :1997 + a1:2002 en 60747-5-2:2001 + a1:2002 din en 60747-5-2 (vde 0884 teil 2):2003-01 ul approval under ul 1577 component recognition pro- gram up to v iso = 3750 v rms for the ACPL-H312 and v iso = 5000 v rms for the acpl-k312, file e55361 csa approval under csa component acceptance notice #5, file ca 88324. recommended pb-free ir profi le recommended refl ow condition as per jedec standard, j-std-020 (latest revision). non-halide flux should be used.
5 table 1. iec/en/din en 60747-5-2 insulation characteristics [1] (ACPL-H312/k312 option 060) description symbol ACPL-H312 acpl-k312 unit installation classifi cation per din vde 0110/1.89, table 1 for rated mains voltage 150 v rms for rated mains voltage 300 v rms for rated mains voltage 450 v rms for rated mains voltage 600 v rms for rated mains voltage 1000 v rms i C iv i C iv i C iii i C iii i - iv i - iv i - iv i - iv i - iii climatic classifi cation 55/100/21 55/100/21 pollution degree (din vde 0110/1.89) 2 2 maximum working insulation voltage v iorm 891 1140 v peak input to output test voltage, method b [1] v iorm x 1.875=v pr , 100% production test with t m =1 sec, partial discharge < 5 pc v pr 1670 2137 v peak input to output test voltage, method a [1] v iorm x 1.5=v pr , type and sample test, t m =60 sec, partial discharge < 5 pc v pr 1336 1710 v peak highest allowable overvoltage (transient overvoltage t ini = 10 sec) v iotm 6000 8000 v peak safety-limiting values C maximum values allowed in the event of a failure. case temperature input current output power t s i s, input p s, output 175 230 600 175 230 600 c ma mw insulation resistance at t s , v io = 500 v r s >10 9 >10 9 ? notes: 1. refer to the optocoupler section of the isolation and control components designers catalog, under product safety regulation s section, (iec/en/ din en 60747-5-2) for a detailed description of method a and method b partial discharge test profi les. 2. these optocouplers are suitable for safe electrical isolation only within the safety limit data. maintenance of the safety data shall be ensured by means of protective circuits. surface mount classifi cation is class a in accordance with cecc 00802. table 2. insulation and safety related specifi cations parameter symbol ACPL-H312 acpl-k312 units conditions minimum external air gap (clearance) l(101) 7.0 8.0 mm measured from input terminals to output terminals, shortest distance through air. minimum external tracking (creepage) l(102) 8.0 8.0 mm measured from input terminals to output terminals, shortest distance path along body. minimum internal plastic gap (internal clearance) 0.08 0.08 mm through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. tracking resistance (comparative tracking index) cti > 175 >175 v din iec 112/vde 0303 part 1 isolation group iiia iiia material group (din vde 0110, 1/89, table 1) notes: 1. all avago data sheets report the creepage and clearance inherent to the optocoupler component itself. these dimensions are n eeded as a starting point for the equipment designer when determining the circuit insulation requirements. however, once mounted on a prin ted circuit board, minimum creepage and clearance requirements must be met as specifi ed for individual equipment standards. for creepage, the shortest distance path along the surface of a printed circuit board between the solder fi llets of the input and output leads must be considered. there are recommended techniques such as grooves and ribs which may be used on a printed circuit board to achieve desired creepage and cl earances. creepage and clearance distances will also change depending on factors such as pollution degree and insulation level.
6 table 3. absolute maximum ratings parameter symbol min. max. units note storage temperature t s -55 125 c operating temperature t a -40 100 c junction temperature t j 125 c average input current i f(avg) 25 ma 1 peak transient input current (<1 s pulse width, 300pps) i f(tran) 1.0 a reverse input voltage v r 5v high peak output current i oh(peak) 2.5 a 2 low peak output current i ol(peak) 2.5 a 2 supply voltage v cc C v ee 035v input current (rise/fall time) t r(in) /t f(in) 500 ns output voltage v o(peak) 0v cc v output power dissipation p o 250 mw 3 total power dissipation p t 295 mw 4 lead solder temperature 260c for 10 sec., 1.6 mm below seating plane solder refl ow temperature profi le see package outline drawings section table 4. recommended operating conditions parameter symbol min. max. units note power supply v cc - v ee 15 30 v input current (on) i f(on) 716ma input voltage (off) v f(off) - 3.6 0.8 v operating temperature t a - 40 100 c
7 table 5. electrical specifi cations (dc) over recommended operating conditions (t a = -40 to 100c, i f(on) = 7 to 16 ma, v f(off) = -3.6 to 0.8 v, v cc = 15 to 30v , v ee = ground) unless otherwise specifi ed. all typical values at t a = 25c and v cc - v ee = 30 v, unless otherwise noted. parameter symbol min. typ. max. units test conditions fig. note high level output current i oh 0.5 1.5 a v o = v cc C 4 v 2, 3, 17 5 2av o = v cc C 15 v 2 low level output current i ol 0.5 2.0 a v o = v ee + 2.5 v 5, 6, 18 5 2av o = v ee + 15 v 2 high level output voltage v oh v cc -4 v cc -3 v i o = -100 ma 1, 3, 19 6, 7 low level output voltage v ol 0.1 0.5 v i o = 100 ma 4, 6, 20 high level supply current i cch 1.8 3.0 ma output open, i f = 7 to 16 ma 7, 8 low level supply current i ccl 1.8 3.0 ma output open, v f = -3.6 to +0.8 v 7, 8 threshold input current low to high i flh 2.3 5 ma i o = 0 ma, v o > 5 v 9, 15, 21 threshold input voltage high to low v fhl 0.8 v i o = 0 ma, v o > 5 v input forward voltage v f 1.2 1.5 1.8 v i f = 10 ma 16 temperature coeffi cient of input forward voltage v f /t a -1.6 mv/c i f = 10 ma input reverse breakdown voltage bv r 5vi r = 10 a input capacitance c in 60 pf f = 1 mhz, v f = 0 v uvlo threshold v uvlo+ 11 12.3 13.5 v i f = 10 ma, v o > 5 v 22 v uvloC 9.5 11.0 12 v i f = 10 ma, v o > 5 v 22 uvlo hysteresis uvlo hys 1.4 v i f = 10 ma, v o > 5 v
8 table 6. switching specifi cations (ac) over recommended operating conditions (t a = -40 to 100c, i f(on) = 7 to 16 ma, v f(off) = -3.6 to 0.8 v, v cc = 15 to 30 v, v ee = ground) unless otherwise specifi ed. all typical values at t a = 25c and v cc - v ee = 30 v, unless otherwise noted. parameter symbol min. typ. max. units test conditions fig. note propagation delay time to high output level t plh 0.05 0.28 0.5 s r g = 10 ? , c g = 10 nf, f = 10 khz, duty cycle = 50% 12, 13, 14, 23 8 propagation delay time to low output level t phl 0.05 0.26 0.5 s pulse width distortion pwd 0.3 s 9 propagation delay diff erence between any two parts or channels pdd (t phl C t plh ) -0.35 0.35 s 10 rise time t r 0.05 s 23 fall time t f 0.05 s output high level common mode transient immunity |cm h | 15 30 kv/s t a = 25c, i f = 10 to 16 ma, v cm = 1500 v v cc = 30 v 24 11, 12 output low level common mode transient immunity |cm l | 15 30 kv/s t a = 25c, v f = 0 v, v cm = 1500 v v cc = 30 v 24 11, 13
9 table 7. package characteristics over recommended temperature (t a = -40 to 100c) unless otherwise specifi ed. all typicals at t a = 25c. parameter symbol part number min. typ. max. units test conditions fig. note input-output momentary withstand voltage** v iso ACPL-H312 3750 v rms rh < 50%, t = 1 min., t a = 25c 14, 16 acpl-k312 5000 15, 16 resistance (input-output) r i-o 10 12 ? v i-o = 500 v 16 capacitance (input-output) c i-o 0.6 pf freq= 1mhz ** the input-output momentary withstand voltage is a dielectric voltage rating that should not be interpreted as an input-outpu t continuous voltage rating. for the continuous voltage rating refers to your equipment level safety specifi cation or avago application note 1074 entitled optocoupler input-output endurance voltage. notes: 1. derate linearly above 70 c free-air temperature at a rate of 0.3 ma/c. 2. maximum pulse width = 10 s. 3. derate linearly above 78 c free-air temperature at a rate of 5.7 mw/c. 4. derate linearly above 78 c free-air temperature at a rate of 6.0 mw/c. the maximum led junction temperature should not exc eed 125c. 5. maximum pulse width = 50 s 6. in this test v oh is measured with a dc load current. when driving capacitive loads v oh will approach v cc as i oh approaches zero amps. 7. maximum pulse width = 1 ms 8. this load condition approximates the gate load of a 1200 v/100a igbt. 9. pulse width distortion (pwd) is defi ned as |t phl - t plh | for any given device. 10. the diff erence between tphl and t plh between any two ACPL-H312/k312 parts under the same test condition. 11. pins 3 and 4 need to be connected to led common. 12. common mode transient immunity in the high state is the maximum tolerable dv cm /dt of the common mode pulse, v cm , to assure that the output will remain in the high state (i.e., v o > 15.0 v). 13. common mode transient immunity in a low state is the maximum tolerable dv cm /dt of the common mode pulse, vcm, to assure that the output will remain in a low state (i.e., v o < 1.0 v). 14. in accordance with ul1577, each optocoupler is proof tested by applying an insulation test voltage 4500 vrms for 1 second (leakage detection current limit, i i-o 5 a). 15. in accordance with ul 1577, each optocoupler is proof tested by applying an insulation test voltage > 6000 vrms for 1 secon d (leakage detection current limit ii-o < 5 a). 16. device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together and pins 5, 6, 7, and 8 shorted together.
10 (v oh ? v cc ) ? high output voltage drop ? v -40 -4 t a ? temperature ? c 100 -1 -2 -20 0 02040 -3 60 80 i f = 7 to 16 ma i out = -100 ma v cc = 15 to 30 v v ee = 0 v i oh ? output high current ? a -40 1.0 t a ? temperature ? c 100 1.8 1.6 -20 2.0 02040 1.2 60 80 i f = 7 to 16 ma v out = (v cc - 4 v) v cc = 15 to 30 v v ee = 0 v 1.4 (v oh ? v cc ) ? output high voltage drop ? v 0 -6 i oh ? output high current ? a 2.5 -2 -3 0.5 -1 1.0 1.5 -5 2.0 i f = 7 to 16 ma v cc = 15 to 30 v v ee = 0 v -4 100c 25c -40c v ol ? output low voltage ? v -40 0 t a ? temperature ? c -20 0.25 020 0.05 100 0.15 0.20 0.10 40 60 80 v f (off) = -3.0 to 0.8 v i out = 100 ma v cc = 15 to 30 v v ee = 0 v 2 1 0 3 4 i ol ? output low current ? a t a ? temperature ? c -40 -20 0 20 40 60 80 100 v f (off) = -3.0 to 0.8 v v out = 2.5 v v cc = 15 to 30 v v ee = 0 v v ol ? output low voltage ? v 0 0 i ol ? output low current ? a 2.5 3 0.5 4 1.0 1.5 1 2.0 v f(off) = -3.0 to 0.8 v v cc = 15 to 30 v v ee = 0 v 2 100 c 25 c -40 c figure 1. v oh vs. temperature figure 2. i oh vs. temperature figure 3. v oh vs. i oh figure 4. v ol vs. temperature figure 5. i ol vs. temperature figure 6. v ol vs. i ol .
11 1.0 1.5 2.0 2.5 3.0 -40 -20 0 20 40 60 80 100 t a -temperature-oc i cc -supply current-ma 1.0 1.5 2.0 2.5 3.0 15 20 25 30 v cc - supply voltage-v i cc -supply current-ma 0 1 2 3 4 5 -40 -20 0 20 40 60 80 100 t a -temperature-c v cc = 15 to 30v vee =0v output=open iccl icch iccl icch i flh ? low to high current threshold ? ma 100 200 300 400 500 15 20 25 30 propagation delay vs. v cc t p -propagation delay-ns tphl tplh v cc = 30v,vee =0v rg=10 , cg=10nf duty cycle=50% f=10khz 100 200 300 400 500 6 8 10 12 14 16 propagation delay vs. i f t p -propagation delay-ns tphl tplh v cc = 30v,vee =0v rg=10 , cg=10nf duty cycle=50% f=10khz 100 200 300 400 500 -40 -20 0 20 40 60 80 100 t a -temperature-c t p -propagation delay-ns tphl tplh if=7ma v cc =30v,vee=0v rg=10 ,cg=10nf duty cycle=50% f=10khz figure 7. i cc vs. temperature figure 8. i cc vs. v cc figure 9. i flh vs. temperature figure 10. propagation delay vs. v cc figure 11. propagation delay vs. i f figure 12. propagation delay vs. temperature
12 100 200 300 400 500 10 20 30 40 50 r g -series load resistance- t p -propagation delay-ns tphl tplh i f =7ma v cc = 30v,vee=0v c g =10nf duty cycle=50% f=10khz 100 200 300 400 500 10 20 30 40 50 c g - load capacitance-nf t p -propagation delay-ns tphl tplh i f =7ma v cc = 30v,vee =0v r g =10 duty cycle=50% f=10khz v f ? forward voltage ? volts 1.2 1.3 1.4 1.5 i f ? forward current ? ma 1.7 1.6 1.0 t a = 25c 0.1 0.01 0.001 10 100 1000 i f + ? v f 0 2 4 6 8 10 12 14 16 012345 i f - forward led current-ma v o - output voltage-v figure 13. propagation delay vs. r g figure 14. propagation delay vs. c g figure 15. transfer characteristics figure 16. input current vs. forward voltage
13 i f = 7 to + _ 4v + _ v cc = 15 0.1 f i oh 1 2 3 4 8 7 6 5 + _ + _ + _ + _ + _ 2.5v + _ 0.1 f i ol 1 2 3 4 8 7 6 5 + _ + _ + _ + _ 16ma i f = 7 to 16ma to 30v v cc = 15 to 30v v cc = 15 to 30v v cc = 15 to 30v + _ 0.1 f 100ma v oh 1 2 3 4 8 7 6 5 + _ + _ + _ 0.1 f v ol 100ma 1 2 3 4 8 7 6 5 + _ + _ + _ 0.1 f v o > 5v i f 1 2 3 4 8 7 6 5 + _ + _ 0.1 f 0.1 f + _ v cc 0.1 f v o > 5v i f =10ma 1 2 3 4 8 7 6 5 + _ figure 18. i ol test circuit figure 19. v oh test circuit figure 20. v ol test circuit figure 21. i flh test circuit figure 17. i oh test circuit figure 22. uvlo test circuit
14 10nf v o 10 + _ v cc = 15 to 30v 0.1 f 10khz, 50% duty cycle + _ 500 i f = 7 to 16ma 1 2 3 4 8 7 6 5 + _ + _ + _ + _ figure 23. t plh , t phl , t f , t r , test circuit and waveforms 5v + _ v o + _ v cc = 15 to 3 0.1 f i f v cm = 1500v + _ a b 1 2 3 4 8 7 6 5 + _ + _ + _ + _ + _ + _ + _ + _ figure 24. cmr test circuit and waveforms
15 typical application circuit figure 25 and 26 show two gate driver application circuit using ACPL-H312/k312. an5336 application note describes general method on gate drive optocoupler design 5v + _ + _ v cc = 18v 0.1 f 270 r g q1 q2 + v ce - r pull-down + hvdc -hvdc 3-phase ac + v ce - 1 2 3 4 8 7 6 5 + _ + _ cc + _ + - - - + - figure 25. recommended led drive and application circuit + _ v cc = 18v 0.1 f 270 r g q1 q2 + v ce - r pull-down + hvdc -hvdc 3-phase ac + v ce - 5v + _ + _ v ee = -5v 1 2 3 4 8 7 6 5 + _ + _ + - - + - + _ + _ + _ v ee = -5v + _ v ee = -5v 1 2 3 4 8 7 6 5 1 2 3 4 8 7 6 5 figure 26. ACPL-H312/k312 typical application circuit with negative igbt gate drive
16 thermal model for ACPL-H312/k312 streched-so8 package optocoupler description this thermal model assumes that an 8-pin single-channel plastic package optocoupler is soldered into a 7.62 cm x 7.62 cm printed circuit board (pcb). the temperature at the led and detector junctions of the optocoupler can be calculated using the equations below. t 1 = (r 11 * p 1 + r 12 * p 2 ) + t a -- (1) t 2 = (r 21 * p 1 + r 22 * p 2 ) + t a -- (2) jedec specifi cations r 11 r 12 , r 21 r 22 high k board 311 111 168 notes: 1. maximum junction temperature for above parts: 125 c. defi nitions r 11 : junction to ambient thermal resistance of led due to heating of led r 12 : junction to ambient thermal resistance of led due to heating of detector (output ic) r 21 : junction to ambient thermal resistance of detector (output ic) due to heating of led. r 22 : junction to ambient thermal resistance of detector (output ic) due to heating of detector (output ic). p 1 : power dissipation of led (w). p 2 : power dissipation of detector / output ic (w). t 1 : junction temperature of led (?c). t 2 : junction temperature of detector (?c). t a : ambient temperature. t 1 : temperature diff erence between led junction and ambient (?c). t 2 : temperature deference between detector junction and ambient. ambient temperature: junction to ambient thermal re- sistances were measured approximately 1.25cm above optocoupler at ~23?c in still air
quick gate drive design example using ACPL-H312/k312 the total power dissipation (pt) is equal to the sum of the led input-side power (pi) and detector output-side power (po) dissipation: pt = pi + po pi = i f(on) ,max * v f,max where, i f(on),max = 16ma (table 4) v f,max = 1.8v (table 5) po = po(bias) + po(swtich) = i cc2 * (v cc2 Cv ee ) + v ge * q g * f switch where, po(bias) = steady-state power dissipation in the driver due to biasing the device. po(switch) = power dissipation in the driver due to charg- ing and discharging of power device gate capacitances. i cc2 = supply current to power internal circuity = 3.0ma (table 5) v ge = v cc2 + |v ee | = 18 C (-5v) = 23v (application exam- ple) q g = total gate charge of the igbt or mosfet as described in the manufacturer specifi cation = 240nc (approxima- tion of 100a igbt which can be obtained from igbt data- sheet) f switch = switching frequency of application = 10khz similarly using the maximum supply current i cc2 = 3.0 ma. pi = 16 ma * 1.8 v = 28.8mw po = po(bias) + po(switch) = 3.0 ma * (18 v C (C5 v)) + (18v + 5v) * 240nc * 10 khz = 69mw + 55.2mw = 124.2 mw using the given thermal resistances and thermal model formula in this datasheet, we can calculate the junction temperature for both led and the output detector. both junction temperature should be within the absolute maxi- mum rating. for this application example, we set the am- bient temperature as 78 oc and use the high conductivity thermal resistances. led junction temperature, t1 = (r 11 * p 1 + r 12 * p 2 ) + t a = (311 * 28.8 + 111 * 124.2) + 78 = 22.7 + 78 = 100.7 oc output ic junction temperature, t2 = (r 21 x p 1 + r 22 x p 2 ) + t a = (111 * 28.8 + 168 * 124.2) + 78 = 24 + 78 = 102 oc in this example, both temperature are within the maxi- mum 125 ? c. if the juntion temperature is higher than the maximum junction temperature rating, the desired speci- fi cation must be derated according. for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies in the united states and other countries. data subject to change. cop y right ? 2005-2011 avago technologies. all rights reserved. av02-0821en - june 28, 2011

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